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MRAM
μ μ
μ
3
( )
3
*
23 24 25 26 27
PL PL /
-1
-2 -3
-4
1
5-3
μ
μμ
μ
μμ
•
STT-MRAM
20nm20nm
• .• .• .
STT-MRAM SRAM
(A)
(s)
1x10-10 1x10-9 1x10-8 1x10-7
1x10-5
1x10-4
1x10-3
1x10-2
1 Spintech APL 2009 .2 J. Phys. D 20123 IBM APL 20114 Spintech APL 2011
Order-1
Order-2
Order-3
Order-4
43
21
μμ
•
•
RWL WWL
SWL MTJ
WL
WWL MTJ MTJ
WL
MTJ MTJ
IEDM2012 IMW2013 VLSI Circuit 2013
(a) D-MRAM (b) 3T-2MTJ (c) 2T-2MTJ (d) 4T-2MTJ
0.1
1
10
bzip2 gobmk h264ref xalancbmk gromacs namd calculix lbm
Nor
mal
ized
1M
B-8
way
L2$
pow
er 2MTJ-6T
2MTJ-4T
1MTJ-3T (advanced p-MTJ this work) 1MTJ-3T (referenced p-MTJ)
Normally - Off
Normally - On
SRAM AMAMAMRRRS MS MRRARAMS MS MRASRAMSRAM
100 m
XD
EC
READ & WRITE1K BL
1K W
L
XD
EC
PDEC
4:1MUX
256Rx256C
4:1MUX
256Rx256C
4:1MUX
256Rx256C
4:1MUX
256Rx256C
DriverSA
Rep
eate
r
4:1MUX
256Rx256C
4:1MUX
256Rx256C
4:1MUX
256Rx256C
4:1MUX
256Rx256C
DriverSA
Volta
ge (V
)
Access time (ns)
Pass
Fail
1.2
1.1
1.0
0.9
0.83 4 5 6
0.0
2.0
4.0
6.0
8.0
10.0
0 0.2 0.4 0.6 0.8 1
[A]
[s]
4.2 A
: “Normally-On”: “Normally-On” or “ ”.
Vcc
Micro-controller
Network
Input
Sensor 0
Sensor n
Sensor 1
Input
Sensor Modules
Sensor-netn
SensorControl
SensorControl
SensorControl
Control Sig.
CPU
Sensor-netInterface
VDC
DataIF Peripheral
PowerControl
POR
OSC
Memory
Control Sig.
n
RTC
Vcc-1 Vcc-2
Normally-Off Power ManagerPower Statement Register
Vcc-3
Sensor data buffers
Normally-On
Normally-Off Normally-Off
-> “Normally-Off”
-> “Normally-Off”
I/F
SapplicationSidle_time
Stotal
time
Power
μ μ μ
C0-state
C1/C2-state
C3-state
C4-state
C6-state
M1-state
M4-stateM3-state
1nsec 30 sec 60 sec 400 sec
200nsec20 secIdle time
Average PowerPower
output
Ener
gy[
uJ]
Sensing interval[s]
μ
I/FHW/SW
/ I/FI/F
CPU
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