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Supplementary Information
Thin-layer black phosphorous/GaAs heterojunction p-n diodes
Pascal Gehring,1 Roberto Urcuyo,1 Dinh Loc Duong,1 Marko Burghard,1,a) and Klaus Kern1,2
1Max Planck Institute for Solid State Research, Heisenbergstrasse 1, D-70569 Stuttgart, Germany
2Institut de Physique de la Matière Condensée, Ecole Polytechnique Féderale de Lausanne, CH-1015 Lausanne, Switzerland
Cleaning of GaAs and surface oxide removal
The GaAs wafers were first cleaned by 30 s of O2 plasma treatment (200 W, 0.3 Torr). The
surface native oxide was then removed by the following subsequent etching steps: (i) 2 min
Semiconclean, (ii) 5 s rinsing with DI water, (ii) 5 s rinse with aqueous HCl (30%), (iv) 2s
rinsing with DI water, and (v) blow drying under argon. Finally, the substrates were directly
provided with a spin-coated PMMA layer or loaded into the vacuum chamber for metal
evaporation.
Ohmic contacts to n+-GaAs
100 nm of AuGeNi alloy (54.6% Au, 26.4% Ge, 20% Ni) were thermally evaporated onto the
GaAs, and then diffused into the substrate by an annealing step.
Figure S1. Electrical characterization of bare black phosphorous sheets. (a) Reflection
image and (b) photocurrent map of black phosphorous on Si/SiO2. The photocurrent is only
generated close to the metallic contacts, indicating the formation of Schottky barriers. The value
of the photocurrent is on the order of several nA, about 1000 times smaller than the photocurrent
generated at the heterostructures discussed in the main text. (c) A transfer characteristic at a bias
of 3 mV of a typical black phosphorous device where an EMI-TFSA liquid electrolyte is used for
gating. It follows that the black phosphorous is a p-type semiconductor but can be changed to n-
type by applying high positive gate voltages.
Figure S2. Estimation of the depletion layer thickness. The thickness of the depletion layer
can be estimated by W =√ 2 ∙ εGaAs ε bP ∙ (N AbP+N D
GaAs )2 ( V bi−V )q N A
bP N DGaAs (N A
bP εbP+N DGaAs εGaAs)
(pink curve) if GaAs is considered,
or by W =√ 2 ∙ εbP ∙ (V bi−V )q N A
bP (blue curve) if it is assumed that N AbP ≪N D
GaAs and thus the depletion
layer only forms inside the black phosphorous sheet. In these equations N AbP , N D
GaAs and ε GaAs , εbP
are the carrier densities and dielectric constants of black phosphorous and GaAs, respectively,
and Vbi is the built in potential. For the estimation we used N AbP ≈ 1.2·1023 m-3, N D
GaAs ≈ 2.7·1024 m-
3, ε bP=10, ε GaAs=12 and Vbi = 0.44 eV. It can be seen, that the part of the depletion layer inside
GaAs can be neglected.
Figure S3. Estimation of the shunt and series resistance. (a) Full bias range of the I-V curves
shown in the main text. The linear parts around V = 0 were used to estimate the shunt resistance
Rsh, the linear parts around I = 0 could be used to estimate the series resistance Rs. (b) Equivalent
circuit for a real solar cell. The current IL is generated inside the cell. It can flow through the
diode (blue) or a parallel shunt Rsh resistance (pink). All resistances of the contacts/interfaces are
included in a series resistance Rs (orange). (c) Rsh (extracted from (a)) for different light powers.
The characteristic resistance Voc / Isc is given as a comparison. Since both values are on the same
order of magnitude the fill factor (see main text) is expected to be low. (d) Rs (extracted from (a))
for different light powers. The series resistance, which is most likely dominated by the resistance
between the black phosphorous sheet and the underlying GaAs and the metallic contacts to the
black phosphorous flakes is on the order of 1MΩ which further reduces the efficiency of the
devices.
Figure S4. Gate dependence of the photocurrent around the flat band condition. The
photocurrent of the device changes sign from negative (a) to positive (b) when the bias is larger
than the built-in voltage Vbi (see main text).
Figure S5. AFM height profile of the black phosphorous sheet in the device in the main
text. The cross-sectional profile reveals a sheet height of ~15 nm.
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