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Analysis of C-V Characteristics of InP(p)/InSb/Al2O3/Au MIS Structures in Wide Temperature Range
M. A. Benamara1,a, A. Talbi1,b, Z. Benamara1, c, B. Akkal1,d, N. Chabane Sari2,e, B.Gruzza3,f and C. Robert3,g
1Laboratoire de Microélectronique Appliquée, Université Djillali Liabès de Sidi Bel Abbès 22000, Algérie.
2Unité de Recherche "Matériaux et Energies Renouvelables", Université de Tlemcen 13000, Algérie
3Laboratoire des Sciences des Matériaux pour l’Electronique et d’Automatique, Université Blaise Pascal de Clermont II, Les Cézeaux, 63177, Aubière Cedex, France.
[email protected], [email protected], [email protected], [email protected], [email protected], [email protected],
Keywords: InP, InSb, Temperature, MIS devices.
Abstract. The III-V semiconductors materials and in particularly Indium Phosphide are a promising candidates for the elaboration of high speed electronic compounds. The importance of the interface study is increasing considerably in the last years to understand, the mechanism of interface formations and to control perfectly the technology of the elaborated compounds.
This study presents an electrical characterization of InP(p)/InSb/Al2O3/ Au structures in the range of temperature varying from the temperature of liquid nitrogen to the temperature of 400°K. In order to give the evolution of electrical parameters of these structures with temperature, we have realized Capacitance-Voltage measurements at high frequency for different temperatures. The found results show that there is dispersion in the accumulation region as function with temperature.
The quantity of positive charges in the insulator is estimated to 1.37×1012 atm/cm2 at room
temperature. This value decreases slightly with increasing temperature. It varies from 1.57×1012
atm/cm2 at 77°K to 1.12×1012 atm/cm2 at 400°K. The interface insulator/semiconductor of our samples presents a good electronical quality, the state density is equal to 4.1011 eV-1.cm-2 at room
temperature, this one increases from 4.7×1010 eV-1.cm-2 to 7.1011 eV-1.cm-2 when temperature increases from 77°K to 400°K.
Introduction
The development of micro-electronics and applied physics leads the world of research towards the study of electronic devices containing materials whose performances are complementary to those of silicon. Indeed, because of its remarkable intrinsic properties and its applications in micro-electronics and optoelectronics domain, the indium phosphide presents a considerable interest. However, III-V technology reveals new problems compared to the traditional semiconductors. The V- elements semiconductor is usually very volatile [1].
Also, the InP surface must be treated and well passivated before the deposition of insulator by antimony evaporation [2, 3].
In this work and to give more comprehension of the phenomenon intervening on the interface insulator/ semiconductor of InP(p)/InSb/Al2O3/Au as function with the temperature, we have plotted C(V) measurements of the structure varying the temperature from 77 °K to 400 °K at high frequency 1 MHz that covers the range of low and high temperatures.
Advanced Materials Research Vol. 685 (2013) pp 179-184Online available since 2013/Apr/24 at www.scientific.net© (2013) Trans Tech Publications, Switzerlanddoi:10.4028/www.scientific.net/AMR.685.179
All rights reserved. No part of contents of this paper may be reproduced or transmitted in any form or by any means without the written permission of TTP,www.ttp.net. (ID: 130.207.50.37, Georgia Tech Library, Atlanta, USA-16/11/14,14:26:16)
The electrical characterization of the structures was completed by a modelization of transport phenomena as function with the temperature. This allows us the analyze and the optimization of the electronical properties of the studied structures.
Experimental Parts
The used InP (100) substrates were p-type doped (Zn) with concentration equal to 1016cm-3. They were chemically cleaned according to a method based on successive baths of H2SO4 solution,
methanol solution with 3% bromine and desionized water [2]. After that, they were introduced into an ultrahigh vacuum (UHV) chamber at pressure of 10-9 - 10-10 Torr. The sample surface was controlled by Auger electron spectroscopy. A low rate of carbon oxygen atom contamination was detected. These impurities were removed in situ by cleaning with low-energy Ar+ ions (ion energy =
300 eV, ionic current = 2 µA.cm-2) which induces metallic indium formation in the shape of
submicroscopic droplets [4]. The surface can be stabilized by creating an established number of InSb monolayers before the dielectric deposition.
The condensation of the alumina layer is performed using a special evaporation source [3]. To achieve the measurements, we have used metallic gate with gold evaporation of 4.10-3 cm2 gate surface and thick layers of about 1000 Å.
The interface and dielectric properties of the InP(p)/InSb/Al2O3/Au structures were investigated using C(V) measurements at high frequency (1 MHz) at different values of temperatures. These one were varying from the liquid nitrogen temperature 77 °K to the temperature of 400 °K.
Result and Discussion
A model based on the solution of Poisson equation has been used to calculate ideal C(V) curves and the variations of the space charge and, consequently, the differential capacitance CD at different regions of polarization. The interfacial state density is measured from the comparison of two C(V) curves: one obtained at high frequency, the other calculated theoretically [5].
In order to calculate the theoretical C(V) curves at different temperatures, at ideal case we have introduced in our model the physical parameters of a semiconductor that depends on the temperature and whose influencing the capacitive behavior of structure as: - the width of the band gap of the semiconductor Eg, given by the following equation:
( ) ( )( )TT
ETE gg +−=βα 2
0 (1)
where: Eg(T): is the width of band gap at T temperature and Eg(0) at 0 °K; α= 7,8 ×10-4 eV.K-1, β= 162; [6] - The intrinsic concentration of a semiconductor is given as follow:
( )
−=
kT
ENNn
g
vci2
exp21
(2)
with: Nc, Nv : are the effective densities of states in the conduction and the valence bands respectively and given by the following equations:
( ) ( ) 23
23
19
30010.5,20
Tm
mN ec= [6] (3)
( ) ( ) 23
23
19
30010.5,20
Tm
mN tv= (4)
180 Advanced Materials Research III
with: me/m0: effective mass of electrons; mt/m0: effective mass of holes.
The comparison of the ideal and experimental curves allows us to evaluate the interfacial states density Nss. Then, the interfacial states density can be estimated by the following formula:
( )S
ssss
Q
qAN
ψ∆∆∆
−= 1 (5)
where q is the modulus of the electron charges, ψs the potential surface, Qss the charge quantity of traps and A the gate area.
The flat band voltage was evaluated using a comparative method between theoretical and
experimental C(V) characteristics. The charge density expression is given by:
[ ] ( )msBPi
sssiT VqA
CQQ
AqQ φψ −−==+−= )0(
.
1 (6)
where VFB is the flat band voltage, Ci insulator capacitance and φms the difference in work function between the metal and the semiconductor.
At Room Temperature. The electrical C(V) characteristics of the InP(p)/InSb/Al2O3/Au structure plotted at 1 MHz and at room temperature is given in Fig.1. It is typical for MIS structure. The maximum capacitance Cmax was 109.6 pF corresponding to the alumina capacitance Ci. To evaluate the thickness di of the insulator layer, we have used the following equation:
Ad
CCi
ioi .max
εε== (7)
where εi is the permittivity of alumina and is equal to (5× 8.85)×10-14 F.cm-1 and di is evaluated to 1585 Å.
Fig.1 The C(V) characteristics obtained at room temperature.
The comparison of the theoretical and experimental curves shows shift between the theoretical and experimental curves. This shift indicates the presence of positive charges in the insulator layer. Then, we have calculated a flat band voltage VFB = - 8.4V. The quantity of positive charges in the
insulator layer is estimated at 1.37×1012 atm/cm2.
The state density is evaluated in the midgap at 4×1011 eV-1.cm-2.
-15 -10 -5 0 5 10 15 0,0
0,2
0,4
0,6
0,8
1,0T=300°K=27°C
Experimental
Simulated
C/Ci
Bias voltage (V)
Advanced Materials Research Vol. 685 181
Study as Function with Temperatures. The electrical C(V) characteristics of the InP(p)/InSb/Al2O3/Au structures plotted at 1 MHz for different temperatures are given in Fig.2. These curves are typical of a MIS structures. For a negative bias (< -8 volts), we observe a dispersion of capacitance in the accumulation region. Its values decrease from Cacc= 178.3 pF at 77 °K to 85.8 pF at 400 °K. This is due to the presence of states and charges in the insulator.
Fig.2 The C(V) characteristics obtained at different temperatures.
For V>-5 Volts, it’s the inversion region, the capacitance increases with the temperature, we
have an injection phenomenon, this results are in good agreement with literature [7]. The ideal and experimental curves are compared for each temperature. The shift gives different
flat band voltages shown in table. 1. The quantity of positive charges in the insulator is calculated for different temperatures and given in table. 1. We have found that this value decreases slightly
with increasing temperature. It varies from 1.57×1012 atm/cm2 at 77°K to 1.13×1012 atm/cm2 at 400°K. This is due to the rearrangement and the restructuration of cristalline system with temperature effect. Its evolution with the temperature is shown in Fig.3.
-15 -10 -5 0 5 10 150
50
100
150
200
T=77 °K = -196°C
T=100 °K = -173°C
T=150 °K = -123°C
T=200 °K = -73°C T=250 °K = -23°C
T=300 °K = 27°C
T=350 °K = 77°C
T=400 °K = 127°C
Capacitance (
pF
)
Bias voltage (V)
182 Advanced Materials Research III
Fig.3 Variation of charge quantity and state density in the midgap as function with the temperature.
Table 1 Different parameters of the structures based on InP substrates at different temperatures.
T (kelvin) 77 100 150 200 250 300 350 400
Eg (eV) 1.40 1.39 1.36 1.33 1.30 1.27 1.23 1.20
Nc (cm-3) 0.64×1017 0.95×1017 0.17×1018 0.27×1018 0.38×1018 0.5×1018 0.62×1018 0.76×1018
Nv (cm-3) 2.64×1018 3.9×10-18 7.17×1018 1.1×1019 1.54×1019 2.02×1019 2.56×1019 3.12×1019
ni (cm-3) 5.34×10-29 5.18×10-18 1.29×10-5 2.58×101 1.76×105 6.8×107 5.13×109 1.35×1010
Cmax (pF) 178.3 173.7 151.7 143.6 126 109.6 105.9 85.8
VBP (Volt) -6.4 -6.7 -6.8 -7 -8 -8.4 -8.7 -9
The distribution of state density in the band gap is calculated for different values of
temperatures. The state densities evaluated in the midgap for different temperatures are given in the table 1. The interface insulator/semiconductor of our samples is of a good quality, it presents a state
increasing from 4.7×1010 eV-1.cm-2 to 7×1011 eV-1.cm-2 when temperature increases from 77°K to 400°K. The evolution of states density in the band gap with the temperature is shown in Fig.3.
We note increase of state density with temperatures, this is probably due to the thermal activation of states and degradation of the semiconductor surface deducing the creation of the dangling bonds and dislocations at the semiconductor/ Insulator interface.
These results are very interesting and show a good quality of interface whose can be used for the realization of MIS transistor with the restructured InP substrates.
Advanced Materials Research Vol. 685 183
Conclusion
In this paper, we have presented a characterization of insulator/semiconductor interface of InP(p)/InSb/Al2O3/Au structures by studying the evolution of its temperature dependence. The dispersion in the accumulation region is due to the presence of states and defects in the insulator.
We observe that the flat band voltage and the charge density of insulator decrease when temperature increases. The effect is due to the rearrangement and the restructuration of cristalline system.
Increase of state density is noted, this isprobably due to the thermal degradation of the semiconductor surface deducing the creation of the dangling bonds and dislocations at the semiconductor/ Insulator interface.
Although, this increase of state density and the obtained value of charge in the insulator remain very interesting. The technology of the elaboration of our structures can be used for the realization of the performance MIS transistors devices.
References
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[2] L. Bideux, C. Robert, B. Gruzza, V. Matolin, Z. Benamara. Surf. Sci. 407-10 (1996) 352.
[3] B. Gruzza, C. Pariset. Surf. Sci. 247 (1991) 408.
[4] L. Bideux, S. Merle, C. Robert, B. Gruzza, Z. Benamara, S. Tizi, M. Chellali. Surf. Interface. Anal. 26 (1998) 177.
[5] L M. Terman. Solid State Electron. 5 (1962) 285.
[6] H. Mathieu. « Physique des Semiconducteurs et des composants électroniques » (1997) Ed Masson.
[7] M. Chellali, S. Tizi, Z. Benamara, M. Amrani, A. Boudissa, A. Talbi, B. Gruzza. Vaccum 2003 In press.
184 Advanced Materials Research III
Advanced Materials Research III 10.4028/www.scientific.net/AMR.685 Analysis of C-V Characteristics of InP(p)/InSb/Al2O3/Au MIS Structures in Wide Temperature Range 10.4028/www.scientific.net/AMR.685.179