Multilevel hysteresis controller of the novel seven-level packed U cells converter

Youssef OUNEJJAR (IEEE member), Kamal AL-HADDAD (IEEE Fellow Member)

ÉCOL E D E T ECHNOLOG I E SUP ÉRIEURE

Canada Research chair in Electric Energy Conversion and Power Electronics Département de génie électrique,

1100, rue Notre-Dame Ouest, Montréal (Québec) H3C 1K3 E-mail : ounejjar@ieee.org

E-mail : Kamal.Al-Haddad@etsmtl.ca Abstract- In this paper, authors propose a six-band hysteresis vector controller based on the seven level packed U cells (PUC) converter to alleviate harmonics contents of stator voltages and currents of the induction machine. Active and passive filters rating can thus be significantly reduced resulting on a high energetic efficiency and a reduced installation cost. The PUC topology was first introduced in [1]. It combines advantages of the flying capacitor and the cascaded H-bridge topologies. In rectifier operation, the study of the novel converter allows the establishment of the switches gates signals equations leading to the proposed six-band controller which is designed to draw a sinusoidal line current with a unity power factor. Harmonics contents of line current and rectifier input voltage are then very reduced. The proposed concepts were verified by simulations performed in the Matlab Simulink and SimPowerSystem environments. Index terms: packed U cells, multilevel converters, hysteresis, vector control, induction machine, unity power factor operation

I. INTRODUCTION

Traditional multilevel converters like neutral point converters NPC proposed by Nabae, Takahashi and Akagi [2] and flying capacitors converters FCC proposed by Meynard and Foch [3] present many drawbacks if the number of voltage levels grows. In fact, the number of switches, diodes and capacitors grows excessively resulting on an expensive cost and their implementation becomes very complicated. When number of desired voltage level exceeds three, cascaded H-bridge inverters topology [4] becomes the optimal solution. This is due to their small number of switches and passive components. However, this topology requires independent and isolated DC voltage sources, which leads to the use of transformers.

In the last few years, many optimizations have been presented to improve the efficiency of these multilevel converters [5-11]. In these papers, authors propose multilevel inverters synthesizing a large number of levels with improved output waveforms characterized by a low distortion and smaller filter size. The packed U cells converter combines advantages of flying capacitors converter and cascaded H-bridges one. It uses small number of switches, diodes and capacitors [12-14]. Both pulse width modulation and hysteresis current techniques are used to control multilevel converters. The second strategy has very simple implementation but it presents a sporadic switching frequency, whereas the first strategy has a complex implementation but is characterized by a constant switching frequency. The hysteresis control technique has proven to be the most suitable solution for all the applications of current controlled voltage source inverters where performance requirements are more demanding, such as active filters, drives and high-performance ac power conditioners, albeit at the expense of variable switching frequency. However, some approaches are available in the literature to obtain fixed switching frequency under hysteresis control [15]. In this paper, a novel six-band hysteresis technique is proposed to control the PUC seven level converter in both rectifier and inverter operation. The proposed technique allows a nearly sinusoidal line or load current with a seven level voltage input or output voltage in case of rectifier or inverter operation respectively.

II. PRESENTATION OF THE PACKED U CELLS TOPOLOGY

A topological optimization of the classic cascaded H-bridge inverters results on a new competitive topology which uses small number of passive and active components (figure1). A comparison of the PUC topology toward other seven level converters is given in table1. The seven levels neutral point converter NPC and the flying capacitors converter FCC use a very high number of switches, diodes, and capacitors,

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SPEEDAM 2010International Symposium on Power Electronics,Electrical Drives, Automation and Motion

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whereas the hybrid cascaded H-bridge inverters topology use only eight switches. The PUC topology, however, uses only six switches (see figure 1).

Fig.1. Single phase 7-level packed U cells (PUC) inverter

Table1. Comparison of seven level topologies toward PUC converter

Diode clamped

Flying capacitors

Classic cascaded H-bridge

Hybrid cascaded H-bridge

PUC topology

Capacitors 6 6 3 2 2 Clamping

diodes 10 0 0 0 0

Switches 12 12 12 8 6

III. SIX BAND HYSTERESIS VECTOR CONTROLLER OF AN INDUCTION MACHINE BASED ON THE SEVEN LEVEL PUC

INVERTER

Figure 1 shows the single phase 7-level PUC inverter.

iT and iT′ switches operate complementarily, thus, only Ti switches are used. The seven level voltages attainable are given in table 2. When actual load current is lower that its reference, then, the application of a positive voltage across the load allows their rapprochement Thus, the positive voltages (sector I in figure 2) are applied when the current error �i, which is the difference between actual load current and its reference, is negative. Contrariwise, the negative voltages (sector II) are applied when the current error is positive. The seven states and their transition conditions are depicted in figure 3. In vector control of induction machine, the quadrature current reference iqref, which controls the motor torque, is generated from the comparison between the speed reference and the actual rotor speed, whereas, the direct current reference idref, which controls the motor flux, is generated from the rotor flux reference. Stator currents are, then, obtained by applying Park transformation.

Sw

itches pulses

Fig.2. Six band hysteresis controller of the 7-level PUC inverter

Table 2: Switching table of the 7-level PUC converter

Van T1 T2 T3 V1 1 0 0

V1-V2 1 0 1 V2 1 1 0 0 0 0 0

-V2 0 0 1 V2-V1 0 1 0

-V1 0 1 1

Fig.3. Chart flow of the six band hysteresis controller The six-band hysteresis controller is, then, used to generate the switches gates pulses as shown in figure 4. Simulation was performed in Matlab Simulink and SimPowerSystems environment. The system parameters are the following:

Dynamics of the proposed concept are very good even under severe speed reference variations as shown in figure5.

Stator resistance and inductance 87m�, 0.8 mH Rotor resistance and inductance 0.228 �, 0.8 mH Mutual inductance 34.7mH Inertia, friction factor 1.662 kg.m2, 0.1N.m.s Pole pairs 2

187

Dynamics of the proposed concept are very good even under severe speed reference variations as shown in figure5. Reference of rotor speed is now maintained at 150 rad/s, and a 50N.m load step occurs at t=6s. Initially load torque is null. The rotor speed is well controlled even under load variations as shown in figure 6. A loop effect is given in figure 6.b to show transient.

Fig.4. Proposed six-band hysteresis vector controller of the induction machine

0 5 10 150

20

40

60

80

100

120

140

160

Simulation time (s)

Rot

or s

peed

(ra

d/s)

Fig.5. Evolution of rotor speed under severe reference variations

0 2 4 6 8 10 12-20

0

20

40

60

80

100

120

140

160

180

200

Simulation time (s)

Rot

or s

peed

(ra

d/s)

(a)

6 7 8 9 10 11 12165

166

167

168

169

170

171

172

173

174

175

Simulation time (s)

Rot

or s

peed

(ra

d/s)

(b)

Fig.6. (a) Evolution of rotor speed under load variation (b) loop effect

5 5.005 5.01 5.015 5.02 5.025 5.03 5.035 5.04 5.045 5.05-30

-20

-10

0

10

20

30

Simulation time (s)

Sta

tor cu

rren

ts (A)

(a)

11 11.005 11.01 11.015 11.02 11.025 11.03 11.035 11.04 11.045 11.05-40

-30

-20

-10

0

10

20

30

40

Simulation time (s)

Sta

tor cu

rren

ts (A)

(b)

Fig. 7. Stator currents (a) before and (b) after load change

-40 -30 -20 -10 0 10 20 30 40-40

-30

-20

-10

0

10

20

30

40

i�( A

)

Fig.8. Stator currents in �� plan

188

3.5 3.505 3.51 3.515 3.52 3.525 3.53 3.535 3.54 3.545 3.55-800

-600

-400

-200

0

200

400

600

800

Simulation time (s)

Sta

tor

volta

ge (

V)

Fig.9. Stator voltage

0 2 4 6 8 10 12-50

0

50

100

150

200

250

300

350

Simulation time (s)

Ele

ctro

mag

netic

torq

ue (

N.m

)

Fig.10. Evolution of the electromagnetic torque

Figures 7.a and 7.b show stator current before and after load variation respectively. One can notice that these current draw nearly a perfect sinusoid without passive or active filters. The current ripple depends on the hysteresis bandwidth. Transient of stator current is shown in figure 8. The stator line-to-line voltage is constituted from thirteen voltage levels as shown in figure 9. The evolution of the electromagnetic torque is given in figure 10.

IV. NOVEL SIX BAND HYSTERESIS CONTROLLER OF THE SEVEN LEVEL PUC RECTIFIER

Applying the Kirchhoff voltage law to the input of the 7-level PUC rectifier shown in figure 11 leads to the following equation:

s

anes

Lvv

dtdi −

= (1)

In each state of the 7-level PUC rectifier, the voltage van is constant as shown in table 2. Thus, when the source voltage

and van are positives then dtdis is positive and the line

current increases. Contrariwise, it decreases.

Fig. 11: Single phase 7-level packed U cells (PUC) rectifier

When van is positive the capacitors will be in charge or discharge mode if the source voltage is positive or negative respectively. The capacitors are not in charge or discharge mode when van is null. In this case, the line current will increase or decrease if the source voltage is positive or negative respectively. Assuming a unity power factor operation, one can observe that switch T1 is ON only when the current error �i is negative and the source voltage ve is positive. Thus, the T1 switch pulse can be given by:

( ))sgn(1).sgn(1 ivT e Δ−= (2) Where:

ss iii −=Δ * , is is the line current and is* is its reference

���

<≥

=0001

)sgn(x if x if

x { }i vx e Δ= ,

The analysis of the ON/OFF states of T2 and T3 switches leads to the subdivision of current error into four regions designated by Hi, { }4,3,2,1∈i . These regions can be defined by the following equations:

��� ≤Δ<

=else 0

0i2.h- if H

11 (3)

���

<Δ≥Δ

=2.hi if 02.hi if

H1

2 (4)

��� ≤Δ<−≤Δ<

=else 0

0ih- or hi3.h- if H

.213 (5)

��� Δ<≤Δ<

=else

i3.h or hih if H

0.21

4 (6)

Where h is the hysteresis bandwidth. The gates pulses of switches T1 and T2 are given by:

���

−+=−+=

433

212

)).sgn(1().sgn()).sgn(1().sgn(

HvHvTHvHvT

ee

ee (7)

189

The amplitude of line current reference is given by:

( ) ( ) ���

� +−+�

��

� +−=

sKKVV

sKKVVA i

prefi

pref2

2221

111 (8)

Fig.12. Proposed six band hysteresis control technique for 7-level packed U cells rectifier

The line current reference is then generated by multiplying A and the unit vector to ensure a unity power factor operation as shown in figure 12. The system parameters are the following: Principal and auxiliary DC buses capacitors 4 000 μF Line inductance 3 mH Load resistor 40 ~ 80 � Supply network voltage (ve) 120V rms Hysteresis band 0.4 The reference of the principal DC link bus is 250V, thus the reference of the auxiliary DC bus is the third of this value. Figure 13 shows that these voltages are well controlled even under sudden load change (at t=8s). A loop effect of principal DC bus voltage and line current is depicted in figure 14. Figure 15 shows a nearly sinusoidal line current. The total harmonics distortion THD of line current is about 2.97% which can be lower with a smaller hysteresis band (see figure 16.a). A loop effect on the harmonics contents of line current is given in figure 16.b. Figure 16.c shows the harmonics contents of the line current after load change. The unity power factor operation is maintained even under load variation as shown in figure 18. The rectifier input voltage is constituted from seven level voltages (250, 166.67, 83.33, 0, -83.33, -166.67, -250) as shown in figure17.

0 2 4 6 8 10 12 14 160

83,3333

166,6666

250

Simulation time (s)

DC

-link

bus

and

aux

iliar

y D

C o

utpu

t vo

ltage

s (V

)

Fig.13. Rectifier output voltages

7.8 7.9 8 8.1 8.2 8.3 8.4 8.5240

245

250

255

260

DC

-link

bus

vol

tage

(V

)

7.8 7.9 8 8.1 8.2 8.3 8.4 8.5

-20

0

20

Simulation time (s)

Line

cur

rent

(A

)

(a)

4 6 8 10 12 14 1674

76

78

80

82

84

86

Simulation time (s)

Auxiliary DC bus (V)

(b)

Fig.14. Loop effect of (a) principal DC link voltage and line current

(b) auxiliary DC bus

12 12.005 12.01 12.015 12.02 12.025 12.03-30

-20

-10

0

10

20

30

Simulation time (s)

Line

cur

rent

(A

)

Fig.15. Line current after load change

(a)

190

(b)

(c)

Fig. 16. Harmonics contents of line current before load change (a) with a loop effect (b)

(c) after load change

4 4.005 4.01 4.015 4.02 4.025 4.03

-250

-166,6667

-83,3334

-0,0001

83,3332

166,6665

250

Simulation time (s)

Rec

tifie

r in

put vo

ltage

(V

)

Fig.17. Rectifier input voltage

4 4.005 4.01 4.015 4.02 4.025 4.03-200

-150

-100

-50

0

50

100

150

200

Simulation time (s)

Sou

rce

volta

ge a

nd c

urre

nt (V

, A

)

Fig.18. Source voltage and line current

V. CONCLUSION

A novel six band hysteresis control technique for the seven level packed U cells rectifier is presented in this paper. The proposed controller allows a nearly sinusoidal line current. The DC link buses voltages are well controlled and track their references even under load steps. In inverter operation, a hysteresis vector technique is proposed to control an induction machine. Stator currents are very nearly sinusoidal without use of filters. Stator voltages are constituted from thirteen voltage levels which permits to reduce the rating of active and passive filters resulting on a very high energetic efficiency and a reduced installation cost. The good dynamics of the system prove the efficiency of the proposed controllers.

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